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	SCHEDULE: NOV 11-17, 2006 Issues for the Future of Supercomputing: Impact of Moore's Law and Architecture on Application Performance Session: M06 Event Type: Tutorial Time: 8:30am - 5:00pm Presenter(s): Erik P. DeBenedictis, David E. Keyes, Peter M. Kogge Location: 24 Abstract: This tutorial will explain technologies driving supercomputer speed increases and supercomputers' resulting ability to solve increasingly important problems. In guided session, participants will walk through future supercomputer performance projection on a representative application. Specific topics will include: A review of scientific problems amenable to supercomputers based on the broad-based SCaLeS study. The editor of the SCaLeS report presents this session. The International Technology Roadmap for Semiconductors (ITRS) and its implications for the size, speed, power, and architecture of supercomputers. Current microprocessor-based and emerging "advanced" architectures and their implications on applications performance. There will be special emphasis on the multi-core trend and how applications can use multiple cores effectively. We will discuss the physics issues (speed and power) that will define the end of the current evolutionary trend. We will show how nanotech, reversible logic, and quantum computing may become the basis of a revolutionary change. Chair/ Presenter Details: Erik P. DeBenedictis Sandia National Laboratories David E. Keyes Columbia University Peter M. Kogge University of Notre Dame
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